Field
The present application relates generally to the field of semiconductor fabrication.
Description of the Related Art
Integrated circuits are currently manufactured by an elaborate process in which various layers of materials are sequentially constructed in a predetermined arrangement on a semiconductor substrate.
Meeting the ever increasing electromigration (EM) requirement in copper interconnects is becoming more difficult as Moore's law progresses, resulting in smaller devices. As line dimensions shrink, critical void size for EM failure is also reduced, causing a sharp decrease in mean time to failure. A significant improvement in EM resistance is required to enable continued scaling.
The interface between the dielectric diffusion barrier and metallic material has been shown to be the main path for metallic material diffusion and the weakest link in resisting EM failure. The implementation of a selective metal cap has been challenging because of the difficulty in achieving good selectivity on metallic surfaces versus the dielectric surface. Methods are disclosed herein for selective deposition of metallic films that can be used in this context to decrease electromigration.
Selective deposition of tungsten advantageously reduces the need for complicated patterning steps during semiconductor device fabrication. However, gentle surface treatments, such as thermal or radical treatments are typically preferred to provide desired surface terminations for selective deposition. Such surface treatments may not adequately prepare the desired surface for selective deposition, leading to a loss of selectivity.